KSZ8863RLL Electronic IC Chips Integrated Circuit Board Chips

KSZ8863RLL Electronic IC Chips Integrated Circuit Board Chips

 

Description

 

The KSZ8863MLL, KSZ8863RLL, and KSZ8863FLL are

highly integrated 3-port switch on a chip ICs in industry’s

smallest footprint, enabling a new generation of low port

count, cost-sensitive and power efficient 10/100Mbps

switch systems. Low power consumption, advanced power

management and sophisticated QoS features (e.g., IPv6

priority classification support) make these devices ideal for

IPTV, IP-STB, VoIP, media converter, automotive and

industrial applications.

 

The KSZ8863 family is designed to support the GREEN

requirement in today’s switch systems. Advanced power

management schemes include hardware power down,

software power down, and the energy detect mode that

shuts downs the transceiver when a port is idle.

 

KSZ8863MLL, KSZ8863RLL, and KSZ8863FLL also offer

the by-pass mode, which enables system-level power

savings. In this mode, the processor connected to the

switch through the MII interface can be shut down without

impacting the normal switch operation.

 

The configurations provided by the KSZ8863 family enable

the flexibility to meet requirements of different applications:

• KSZ8863MLL: Two 10/100BASE-T/TX transceivers

  and one MII interface.

• KSZ8863RLL: Two 10/100BASE-T/TX transceivers

  and one RMII interface.

• KSZ8863FLL: One 100BASE-FX transceiver, one

  10/100Base-T/TX transceiver, and one MII interface.

 

The devices are available in RoHS-compliant 48-pin LQFP

package.

 

The datasheets and supporting documents can be found

at Micrel’s web site at: www.micrel.com.

 

 

Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Features	Benefits
Single 2.5V or 3.3V supply with internal 1.8V LDO,  and optional 3.3V, 2.5V or 1.8V VDDIO	Enables low power design.
Port 1 & Port 2 by-pass mode	Ethernet traffic between Port 1 and Port 2 are  sustained while the MII interface (Port 3) is  shut  down. This allows the device connected to  the MII  interface to enter a power saving mode.
4-queue (per port) traffic prioritization, based on  port,  802.1p, 802.1Q VLAN tags, or Differential  Services  (both Ipv4 and Ipv6 priority classification)	Enables the implementation of advanced QoS  policies.
Source address filtering	Enables the implementation of Ethernet ring  network for industrial control and automotive  applications.
Tail tag mode at Port 3	Reduces the overhead of the CPU connected  to  Port 3, by using a tail tag before frame  checksum  to indicate which port receives the  ingress  packet.
Internal generated RMII 50MHz clock  (KSZ8863RLL)	Eliminates expensive external 50MHz oscillator  for the RMII mode.