MACH210A-10JC-12JI Programmable IC Chips High Density EE CMOS Programmable Logic

 
 MACH210A-10JC-12JI Programmable IC Chips High Density EE CMOS Programmable Logic
 
MACH210A-7/10/12
MACH210-12/15/20
MACH210AQ-12/15/20
High-Density EE CMOS Programmable Logic
 
DISTINCTIVE CHARACTERISTICS

• 44 Pins
• 64 Macrocells
• 7.5 ns tPD Commercial                                                                                                           12 ns tPD Industrial
• 133 MHz f_CNT
• 38 Inputs; 210A Inputs have built-in pull-up resistors
• Peripheral Component Interconnect (PCI) compliant
• 32 Outputs
• 64 Flip-flops; 2 clock choices
• 4 “PAL22V16” blocks with buried macrocells
• Pin-compatible with MACH110, MACH111, MACH211, and MACH215

GENERAL DESCRIPTION
The MACH210 is a member of the high-performance EE CMOS MACH 2 device family. This device has approximately six times the logic macrocell capability of the popular PAL22V10 without loss of speed.
The MACH210 consists of four PAL blocks interconnected by a programmable switch matrix. The four PAL blocks are essentially “PAL22V16” structures complete with product-term arrays and programmable macrocells, including additional buried macrocells. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently.
The MACH210 has two kinds of macrocell: output and buried. The MACH210 output macrocell provides registered, latched, or combinatorial outputs with programmable polarity. If a registered configuration is chosen, the register can be configured as D-type or T-type to help reduce the number of product terms. The register type decision can be made by the designer or by the software. All output macrocells can be connected to an I/O cell. If a buried macrocell is desired, the internal feedback path from the macrocell can be used, which frees up the I/O pin for use as an input.
The MACH210 has dedicated buried macrocells which, in addition to the capabilities of the output macrocell, also provide input registers or latches for use in synchronizing signals and reducing setup time requirements.
 
ABSOLUTE MAXIMUM RATINGS
Storage Temperature  . . . . . . . . . . . –65°C to +150°C
Ambient Temperature
  with Power Applied  . . . . . . . . . . . . . –55°C to +125°C
Supply Voltage with
  Respect to Ground  . . . . . . . . . . . . . –0.5 V to +7.0 V
DC Input Voltage . . . . . . . . . . .  –0.5 V to V_CC + 0.5 V
DC Output or
  I/O Pin Voltage. . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Static Discharge Voltage . . . . . . . . . . . . . . . . . 2001 V
Latchup Current
(TA = 0°C to +70°C) . . . . . . . . . . .. . . . . . . . . . 200 mA
                                                                                                                                      
Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. Programming conditions may differ.
 
OPERATING RANGES
Commercial (C) Devices
Temperature (TA) Operating
  in Free Air  . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Supply Voltage (V_CC) with
  Respect to Ground  . . . . . . . . . . . . +4.75 V to +5.25 V
                                                                                                                             
Operating ranges define those limits between which the functionality of the device is guaranteed.
 
 
BLOCK DIAGRAM

 
CONNECTION DIAGRAM
Top View
                                               PLCC

Note: Pin-compatible with MACH110, MACH111, MACH211, and MACH215.
 
CONNECTION DIAGRAM
Top View
                                                      TQFP

Note: Pin-compatible with MACH111 and MACH211.
 
 
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