GAL20V8B-15LPN integrated components Integrated Circuit Chip High Performance E2CMOS PLD Generic Array Logic

GAL20V8

High Performance E2 CMOS PLD Generic Array Logic™

Features

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY

  — 5 ns Maximum Propagation Delay

  — Fmax = 166 MHz

  — 4 ns Maximum from Clock Input to Data Output

  — UltraMOS® Advanced CMOS Technology

• 50% to 75% REDUCTION IN POWER FROM BIPOLAR

  — 75mA Typ Icc on Low Power Device

  — 45mA Typ Icc on Quarter Power Device

• ACTIVE PULL-UPS ON ALL PINS

• E2 CELL TECHNOLOGY

  — Reconfigurable Logic

  — Reprogrammable Cells

  — 100% Tested/100% Yields

  — High Speed Electrical Erasure (<100ms)

  — 20 Year Data Retention

• EIGHT OUTPUT LOGIC MACROCELLS

  — Maximum Flexibility for Complex Logic Designs

  — Programmable Output Polarity

  — Also Emulates 24-pin PAL® Devices with Full Function/ Fuse Map/Parametric Compatibility

• PRELOAD AND POWER-ON RESET OF ALL REGISTERS

  — 100% Functional Testability

• APPLICATIONS INCLUDE:

  — DMA Control

  — State Machine Control

  — High Speed Graphics Processing

  — Standard Logic Speed Upgrade

• ELECTRONIC SIGNATURE FOR IDENTIFICATION

• LEAD-FREE PACKAGE OPTIONS

Description

The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2 ) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.

The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. An important subset of the many architecture configurations possible with the GAL20V8 are the PAL architectures listed in the table of the macrocell description section. GAL20V8 devices are capable of emulating any of these PAL architectures with full function/fuse map/parametric compatibility.

Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.

Absolute Maximum Ratings⁽¹⁾

Supply voltage VCC ...................................... –0.5 to +7V

Input voltage applied .......................... –2.5 to VCC +1.0V

Off-state output voltage applied ......... –2.5 to VCC +1.0V

Storage Temperature ................................ –65 to 150°C

Ambient Temperature

with Power Applied ........................................ –55 to 125°C

1.Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress only ratings and functional operation of the device at these or at any other conditions above those indicated in the operational sections of this specification is not implied (while programming, follow the programming specifications).

Recommended Operating Conditions

Commercial Devices:

Ambient Temperature (TA) ............................... 0 to 75°C

Supply voltage (VCC)

    with Respect to Ground ..................... +4.75 to +5.25V

Industrial Devices:

Ambient Temperature (TA) ........................... –40 to 85°C

Supply voltage (VCC)

    with Respect to Ground ..................... +4.50 to +5.50V

Functional Block Diagram

Pin Configuration

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