40mA DG529CJ Electronics Components Analog CMOS Latchable Multiplexers

40mA DG529CJ Electronics Components Analog CMOS Latchable Multiplexers

DG526, DG527, DG528, DG529

Analog CMOS Latchable Multiplexers

Features

• Direct RESET

• TTL and CMOS Compatible Address and Enable Inputs

• Maximum Power Supply Rating . . . . . . . . . . . . . . . . 44V

• Break-Before-Make Switching

• Alternate Source

Applications

• Data Acquisition Systems

• Communication Systems

• Automatic Test Equipment

• Microprocessor Controlled Systemd

Description

The DG526, DG527, DG528, and DG529 are CMOS Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers. Each device has on-chip address and control latches to simplify design in microprocessor based applications. The DG526 uses 4 address lines to control its 16 channels; the DG527, DG528 both use 3 address lines to control their 8 channels; and the DG529 uses 2 address lines to control its 4 channels.

The enable pin is used to enable the address latches during the WR pulse. It can be hard wired to the logic supply if one of the channels will always be used (except during a reset) or it can be tied to address decoding circuitry for memory mapped operation. The RS pin is used to clear all latches regardless of the state of any other latch or control line. The WR pin is used to transfer the state of the address control lines to their latches, except during a reset or when EN is low.

A channel in the ON state conducts signals equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs, WR, RS and the enable input are TTL and CMOS compatible over the full specified operation temperature range.

Absolute Maximum Ratings

V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44V

V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-25V

VIN to Ground (Note 1). . . . . . . . . . . . . . . . . . . . (V- - 2V), (V+ + 2V)

VS or VD to V+ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . +2V, (V- - 2V)

VS or VD to V- (Note 1). . . . . . . . . . . . . . . . . . . . . . . . -2V, (V+ + 2V)

Current, Any Terminal Except S or D . . . . . . . . . . . . . . . . . . . .30mA

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40mA

(Pulsed at 1ms, 10% Duty Cycle Max)

Operating Conditions

Operating Temperature

    C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0℃ to 70℃

    B Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25℃ to 85℃

    A Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55℃ to 125℃

Thermal Information

Thermal Resistance (Typical, Note 1)     θJA (℃/W)     θJC (℃/W)

    18 Ld PDIP Package . . . . . . . . . . . . . .   90                N/A

    18 Ld CERDIP Package . . . . . . . . . . .    75                 22

    18 Ld SOIC Package . . . . . . . . . . . . . .   95                N/A

    28 Ld PDIP Package . . . . . . . . . . . . . .    60                N/A

    28 Ld CERDIP Package . . . . . . . . . . .     55                18

    28 Ld SOIC Package . . . . . . . . . . . . . .    70                N/A

Maximum Junction Temperature

    Ceramic Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175℃

    Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150℃

Maximum Storage Temperature Range

    C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65℃ to 125℃

    A and B Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65℃ to 150℃

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300℃

    (SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Pinouts

Functional Diagrams

Schematic Diagrams

Stock Offer (Hot Sell)