Anterwell Technology Ltd.
Large Original stock of IC Electronics Components, Transistors, Diodes etc.
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Drain-source Voltage: | 75 V | Drain-gate Voltage: | 75 V |
---|---|---|---|
Gate-source Voltage: | ± 20 V | Peak Diode Recovery Voltage Slope: | 12 V/ns |
Single Pulse Avalanche Energy: | 700 MJ | Operating Junction & Storage Temperature: | -55 To 175 °C |
High Light: | multi emitter transistor,silicon power transistors |
STB75NF75
STP75NF75 - STP75NF75FP
N-channel 75V - 0.0095Ω - 80A - TO-220 - TO-220FP -
D2PAK STripFET™ II Power MOSFET
General features
Type | VDSS | RDS(on) | ID |
STB75NF75 | 75V | <0.011Ω | 80A(1) |
STP75NF75 | 75V | <0.011Ω | 80A(1) |
STP75NF75FP | 75V | <0.011Ω | 80A(1) |
1. Current limited by package
■ Exceptional dv/dt capability
■ 100% avalanche tested
Description
This Power MOSFET series realized with STMicroelectronics unique STripFET™ process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements.
Applications
■ Switching application
Absolute maximum ratings
Symbol | Parameter | Value | Unit | |
D2PAK /TO-220 | TO-220FP | |||
VDS | Drain-source voltage (VGS = 0) | 75 | V | |
VDGR | Drain-gate voltage (RGS = 20KΩ) | 75 | V | |
VGS | Gate-source voltage | ± 20 | V | |
ID (1) | Drain current (continuous) at TC = 25°C | 80 | 80 | A |
ID (1) | Drain current (continuous) at TC = 100°C | 70 | 70 | A |
IDM(2) | Drain current (pulsed) | 320 | 320 | A |
PTOT | Total dissipation at TC = 25°C | 300 | 45 | W |
Derating factor | 2.0 | 0.3 | W/°C | |
dv/dt (3) | Peak diode recovery voltage slope | 12 | V/ns | |
EAS (4) | Single pulse avalanche energy | 700 | mJ | |
VISO | Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1s;TC=25°C) | -- | 2000 | V |
TJ Tstg |
Operating junction temperature Storage temperature |
-55 to 175 | °C |
1. Current limited by package
2. Pulse width limited by safe operating area
3. ISD ≤ 80A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
4. Starting TJ = 25°C, ID = 40A, VDD = 37.5V
Internal schematic diagram
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